/* 
 * Copyright (c) 2019 Xilinx, Inc. 
 * All rights reserved.
 *
 * Author: Chris Lavin, Xilinx Research Labs.
 *  
 * This file is part of RapidWright. 
 * 
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 * 
 *     http://www.apache.org/licenses/LICENSE-2.0
 * 
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 * 
 */
/**
 * 
 */
package com.xilinx.rapidwright.design;

import java.util.HashMap;
import java.util.Map;
import com.xilinx.rapidwright.device.Series;

/**
 * Generated on: Fri Dec 06 10:46:56 2019
 * by: com.xilinx.rapidwright.release.UnisimParser
 * 
 * Enumerates supported Unisim primitives that map to Xilinx devices.
 */
public enum Unisim {
	AIE_NOC_M_AXI,
	AIE_NOC_M_AXIS,
	AIE_NOC_S_AXI,
	AIE_NOC_S_AXIS,
	AIE_PL_M_AXIS128,
	AIE_PL_M_AXIS32,
	AIE_PL_M_AXIS64,
	AIE_PL_M_EVENTS,
	AIE_PL_S_AXIS128,
	AIE_PL_S_AXIS32,
	AIE_PL_S_AXIS64,
	AIE_PL_S_EVENTS,
	AMS_ADC,
	AMS_DAC,
	AND2,
	AND2B1,
	AND2B1L,
	AND2B2,
	AND3,
	AND3B1,
	AND3B2,
	AND3B3,
	AND4,
	AND4B1,
	AND4B2,
	AND4B3,
	AND4B4,
	AND5,
	AND5B1,
	AND5B2,
	AND5B3,
	AND5B4,
	AND5B5,
	AUTOBUF,
	BIBUF,
	BITSLICE_CONTROL,
	BSCANE2,
	BSCAN_SPARTAN3,
	BSCAN_SPARTAN3A,
	BSCAN_SPARTAN6,
	BSCAN_VIRTEX4,
	BSCAN_VIRTEX5,
	BSCAN_VIRTEX6,
	BUF,
	BUFCE_LEAF,
	BUFCE_ROW,
	BUFDIV_LEAF,
	BUFG,
	BUFGCE,
	BUFGCE_1,
	BUFGCE_DIV,
	BUFGCTRL,
	BUFGMUX,
	BUFGMUX_1,
	BUFGMUX_CTRL,
	BUFGMUX_VIRTEX4,
	BUFGP,
	BUFG_FABRIC,
	BUFG_GT,
	BUFG_GT_SYNC,
	BUFG_LB,
	BUFG_PS,
	BUFH,
	BUFHCE,
	BUFIO,
	BUFIO2,
	BUFIODQS,
	BUFMR,
	BUFMRCE,
	BUFR,
	CAPTUREE2,
	CAPTURE_SPARTAN3,
	CAPTURE_SPARTAN3A,
	CAPTURE_VIRTEX4,
	CAPTURE_VIRTEX5,
	CAPTURE_VIRTEX6,
	CARRY4,
	CARRY8,
	CFGLUT5,
	CLKDLL,
	CLKDLLE,
	CLKDLLHF,
	CMAC,
	CMACE4,
	CPM,
	CPM_EXT,
	CPM_MAIN,
	DCIRESET,
	DCM,
	DCM_ADV,
	DCM_BASE,
	DCM_PS,
	DCM_SP,
	DDRMC,
	DDRMC_RIU,
	DIFFINBUF,
	DNA_PORT,
	DNA_PORTE2,
	DPHY_DIFFINBUF,
	DPLL,
	DSP48,
	DSP48A,
	DSP48A1,
	DSP48E,
	DSP48E1,
	DSP48E2,
	DSP48E5,
	DSP58,
	DSPCPLX,
	DSPFP32,
	DSP_ALU,
	DSP_A_B_DATA,
	DSP_C_DATA,
	DSP_MULTIPLIER,
	DSP_M_DATA,
	DSP_OUTPUT,
	DSP_PREADD,
	DSP_PREADD_DATA,
	EFUSE_USR,
	FD,
	FDC,
	FDCE,
	FDCE_1,
	FDCP,
	FDCPE,
	FDCPE_1,
	FDCP_1,
	FDC_1,
	FDE,
	FDE_1,
	FDP,
	FDPE,
	FDPE_1,
	FDP_1,
	FDR,
	FDRE,
	FDRE_1,
	FDRS,
	FDRSE,
	FDRSE_1,
	FDRS_1,
	FDR_1,
	FDS,
	FDSE,
	FDSE_1,
	FDS_1,
	FD_1,
	FE,
	FIFO16,
	FIFO18,
	FIFO18E1,
	FIFO18E2,
	FIFO18_36,
	FIFO36,
	FIFO36E1,
	FIFO36E2,
	FIFO36_72,
	FRAME_ECCE2,
	FRAME_ECCE3,
	FRAME_ECCE4,
	FRAME_ECC_VIRTEX6,
	GND,
	GTHE2_CHANNEL,
	GTHE2_COMMON,
	GTHE3_CHANNEL,
	GTHE3_COMMON,
	GTHE4_CHANNEL,
	GTHE4_COMMON,
	GTM_DUAL,
	GTPA1_DUAL,
	GTPE2_CHANNEL,
	GTPE2_COMMON,
	GTXE1,
	GTXE2_CHANNEL,
	GTXE2_COMMON,
	GTYE3_CHANNEL,
	GTYE3_COMMON,
	GTYE4_CHANNEL,
	GTYE4_COMMON,
	GTYE5_QUAD,
	HARD_SYNC,
	HBM_ONE_STACK_INTF,
	HBM_REF_CLK,
	HBM_SNGLBLI_INTF_APB,
	HBM_SNGLBLI_INTF_AXI,
	HBM_TWO_STACK_INTF,
	HPIO_VREF,
	HSADC,
	HSDAC,
	IBUF,
	IBUFCTRL,
	IBUFDS,
	IBUFDSE3,
	IBUFDS_BLVDS_25,
	IBUFDS_DIFF_OUT,
	IBUFDS_DIFF_OUT_IBUFDISABLE,
	IBUFDS_DIFF_OUT_INTERMDISABLE,
	IBUFDS_DPHY,
	IBUFDS_GTE2,
	IBUFDS_GTE3,
	IBUFDS_GTE4,
	IBUFDS_GTE5,
	IBUFDS_GTM,
	IBUFDS_GTXE1,
	IBUFDS_IBUFDISABLE,
	IBUFDS_IBUFDISABLE_INT,
	IBUFDS_INTERMDISABLE,
	IBUFDS_INTERMDISABLE_INT,
	IBUFDS_LDT_25,
	IBUFDS_LVDSEXT_25,
	IBUFDS_LVDSEXT_25_DCI,
	IBUFDS_LVDSEXT_33,
	IBUFDS_LVDSEXT_33_DCI,
	IBUFDS_LVDS_25,
	IBUFDS_LVDS_25_DCI,
	IBUFDS_LVDS_33,
	IBUFDS_LVDS_33_DCI,
	IBUFDS_LVPECL_25,
	IBUFDS_LVPECL_33,
	IBUFDS_ULVDS_25,
	IBUFE3,
	IBUFG,
	IBUFGDS,
	IBUFGDS_BLVDS_25,
	IBUFGDS_DIFF_OUT,
	IBUFGDS_LDT_25,
	IBUFGDS_LVDSEXT_25,
	IBUFGDS_LVDSEXT_25_DCI,
	IBUFGDS_LVDSEXT_33,
	IBUFGDS_LVDSEXT_33_DCI,
	IBUFGDS_LVDS_25,
	IBUFGDS_LVDS_25_DCI,
	IBUFGDS_LVDS_33,
	IBUFGDS_LVDS_33_DCI,
	IBUFGDS_LVPECL_25,
	IBUFGDS_LVPECL_33,
	IBUFGDS_ULVDS_25,
	IBUFG_AGP,
	IBUFG_CTT,
	IBUFG_GTL,
	IBUFG_GTLP,
	IBUFG_GTLP_DCI,
	IBUFG_GTL_DCI,
	IBUFG_HSTL_I,
	IBUFG_HSTL_II,
	IBUFG_HSTL_III,
	IBUFG_HSTL_III_18,
	IBUFG_HSTL_III_DCI,
	IBUFG_HSTL_III_DCI_18,
	IBUFG_HSTL_II_18,
	IBUFG_HSTL_II_DCI,
	IBUFG_HSTL_II_DCI_18,
	IBUFG_HSTL_IV,
	IBUFG_HSTL_IV_18,
	IBUFG_HSTL_IV_DCI,
	IBUFG_HSTL_IV_DCI_18,
	IBUFG_HSTL_I_18,
	IBUFG_HSTL_I_DCI,
	IBUFG_HSTL_I_DCI_18,
	IBUFG_LVCMOS12,
	IBUFG_LVCMOS15,
	IBUFG_LVCMOS18,
	IBUFG_LVCMOS2,
	IBUFG_LVCMOS25,
	IBUFG_LVCMOS33,
	IBUFG_LVDCI_15,
	IBUFG_LVDCI_18,
	IBUFG_LVDCI_25,
	IBUFG_LVDCI_33,
	IBUFG_LVDCI_DV2_15,
	IBUFG_LVDCI_DV2_18,
	IBUFG_LVDCI_DV2_25,
	IBUFG_LVDCI_DV2_33,
	IBUFG_LVDS,
	IBUFG_LVPECL,
	IBUFG_LVTTL,
	IBUFG_PCI33_3,
	IBUFG_PCI33_5,
	IBUFG_PCI66_3,
	IBUFG_PCIX,
	IBUFG_PCIX66_3,
	IBUFG_SSTL18_I,
	IBUFG_SSTL18_II,
	IBUFG_SSTL18_II_DCI,
	IBUFG_SSTL18_I_DCI,
	IBUFG_SSTL2_I,
	IBUFG_SSTL2_II,
	IBUFG_SSTL2_II_DCI,
	IBUFG_SSTL2_I_DCI,
	IBUFG_SSTL3_I,
	IBUFG_SSTL3_II,
	IBUFG_SSTL3_II_DCI,
	IBUFG_SSTL3_I_DCI,
	IBUF_AGP,
	IBUF_ANALOG,
	IBUF_CTT,
	IBUF_GTL,
	IBUF_GTLP,
	IBUF_GTLP_DCI,
	IBUF_GTL_DCI,
	IBUF_HSTL_I,
	IBUF_HSTL_II,
	IBUF_HSTL_III,
	IBUF_HSTL_III_18,
	IBUF_HSTL_III_DCI,
	IBUF_HSTL_III_DCI_18,
	IBUF_HSTL_II_18,
	IBUF_HSTL_II_DCI,
	IBUF_HSTL_II_DCI_18,
	IBUF_HSTL_IV,
	IBUF_HSTL_IV_18,
	IBUF_HSTL_IV_DCI,
	IBUF_HSTL_IV_DCI_18,
	IBUF_HSTL_I_18,
	IBUF_HSTL_I_DCI,
	IBUF_HSTL_I_DCI_18,
	IBUF_IBUFDISABLE,
	IBUF_INTERMDISABLE,
	IBUF_LVCMOS12,
	IBUF_LVCMOS15,
	IBUF_LVCMOS18,
	IBUF_LVCMOS2,
	IBUF_LVCMOS25,
	IBUF_LVCMOS33,
	IBUF_LVDCI_15,
	IBUF_LVDCI_18,
	IBUF_LVDCI_25,
	IBUF_LVDCI_33,
	IBUF_LVDCI_DV2_15,
	IBUF_LVDCI_DV2_18,
	IBUF_LVDCI_DV2_25,
	IBUF_LVDCI_DV2_33,
	IBUF_LVDS,
	IBUF_LVPECL,
	IBUF_LVTTL,
	IBUF_PCI33_3,
	IBUF_PCI33_5,
	IBUF_PCI66_3,
	IBUF_PCIX,
	IBUF_PCIX66_3,
	IBUF_SSTL18_I,
	IBUF_SSTL18_II,
	IBUF_SSTL18_II_DCI,
	IBUF_SSTL18_I_DCI,
	IBUF_SSTL2_I,
	IBUF_SSTL2_II,
	IBUF_SSTL2_II_DCI,
	IBUF_SSTL2_I_DCI,
	IBUF_SSTL3_I,
	IBUF_SSTL3_II,
	IBUF_SSTL3_II_DCI,
	IBUF_SSTL3_I_DCI,
	ICAPE2,
	ICAPE3,
	ICAP_SPARTAN3A,
	ICAP_SPARTAN6,
	ICAP_VIRTEX4,
	ICAP_VIRTEX5,
	ICAP_VIRTEX6,
	IDDR,
	IDDR2,
	IDDRE1,
	IDDR_2CLK,
	IDELAY,
	IDELAYCTRL,
	IDELAYE2,
	IDELAYE2_FINEDELAY,
	IDELAYE3,
	IDELAYE5,
	ILKN,
	ILKNE4,
	INBUF,
	INV,
	IN_FIFO,
	IOBUF,
	IOBUFDS,
	IOBUFDSE3,
	IOBUFDS_BLVDS_25,
	IOBUFDS_COMP,
	IOBUFDS_DCIEN,
	IOBUFDS_DIFF_OUT,
	IOBUFDS_DIFF_OUT_DCIEN,
	IOBUFDS_DIFF_OUT_INTERMDISABLE,
	IOBUFDS_INTERMDISABLE,
	IOBUFE3,
	IOBUF_AGP,
	IOBUF_ANALOG,
	IOBUF_CTT,
	IOBUF_DCIEN,
	IOBUF_F_12,
	IOBUF_F_16,
	IOBUF_F_2,
	IOBUF_F_24,
	IOBUF_F_4,
	IOBUF_F_6,
	IOBUF_F_8,
	IOBUF_GTL,
	IOBUF_GTLP,
	IOBUF_GTLP_DCI,
	IOBUF_GTL_DCI,
	IOBUF_HSTL_I,
	IOBUF_HSTL_II,
	IOBUF_HSTL_III,
	IOBUF_HSTL_III_18,
	IOBUF_HSTL_II_18,
	IOBUF_HSTL_II_DCI,
	IOBUF_HSTL_II_DCI_18,
	IOBUF_HSTL_IV,
	IOBUF_HSTL_IV_18,
	IOBUF_HSTL_IV_DCI,
	IOBUF_HSTL_IV_DCI_18,
	IOBUF_HSTL_I_18,
	IOBUF_INTERMDISABLE,
	IOBUF_LVCMOS12,
	IOBUF_LVCMOS12_F_2,
	IOBUF_LVCMOS12_F_4,
	IOBUF_LVCMOS12_F_6,
	IOBUF_LVCMOS12_F_8,
	IOBUF_LVCMOS12_S_2,
	IOBUF_LVCMOS12_S_4,
	IOBUF_LVCMOS12_S_6,
	IOBUF_LVCMOS12_S_8,
	IOBUF_LVCMOS15,
	IOBUF_LVCMOS15_F_12,
	IOBUF_LVCMOS15_F_16,
	IOBUF_LVCMOS15_F_2,
	IOBUF_LVCMOS15_F_4,
	IOBUF_LVCMOS15_F_6,
	IOBUF_LVCMOS15_F_8,
	IOBUF_LVCMOS15_S_12,
	IOBUF_LVCMOS15_S_16,
	IOBUF_LVCMOS15_S_2,
	IOBUF_LVCMOS15_S_4,
	IOBUF_LVCMOS15_S_6,
	IOBUF_LVCMOS15_S_8,
	IOBUF_LVCMOS18,
	IOBUF_LVCMOS18_F_12,
	IOBUF_LVCMOS18_F_16,
	IOBUF_LVCMOS18_F_2,
	IOBUF_LVCMOS18_F_4,
	IOBUF_LVCMOS18_F_6,
	IOBUF_LVCMOS18_F_8,
	IOBUF_LVCMOS18_S_12,
	IOBUF_LVCMOS18_S_16,
	IOBUF_LVCMOS18_S_2,
	IOBUF_LVCMOS18_S_4,
	IOBUF_LVCMOS18_S_6,
	IOBUF_LVCMOS18_S_8,
	IOBUF_LVCMOS2,
	IOBUF_LVCMOS25,
	IOBUF_LVCMOS25_F_12,
	IOBUF_LVCMOS25_F_16,
	IOBUF_LVCMOS25_F_2,
	IOBUF_LVCMOS25_F_24,
	IOBUF_LVCMOS25_F_4,
	IOBUF_LVCMOS25_F_6,
	IOBUF_LVCMOS25_F_8,
	IOBUF_LVCMOS25_S_12,
	IOBUF_LVCMOS25_S_16,
	IOBUF_LVCMOS25_S_2,
	IOBUF_LVCMOS25_S_24,
	IOBUF_LVCMOS25_S_4,
	IOBUF_LVCMOS25_S_6,
	IOBUF_LVCMOS25_S_8,
	IOBUF_LVCMOS33,
	IOBUF_LVCMOS33_F_12,
	IOBUF_LVCMOS33_F_16,
	IOBUF_LVCMOS33_F_2,
	IOBUF_LVCMOS33_F_24,
	IOBUF_LVCMOS33_F_4,
	IOBUF_LVCMOS33_F_6,
	IOBUF_LVCMOS33_F_8,
	IOBUF_LVCMOS33_S_12,
	IOBUF_LVCMOS33_S_16,
	IOBUF_LVCMOS33_S_2,
	IOBUF_LVCMOS33_S_24,
	IOBUF_LVCMOS33_S_4,
	IOBUF_LVCMOS33_S_6,
	IOBUF_LVCMOS33_S_8,
	IOBUF_LVDCI_15,
	IOBUF_LVDCI_18,
	IOBUF_LVDCI_25,
	IOBUF_LVDCI_33,
	IOBUF_LVDCI_DV2_15,
	IOBUF_LVDCI_DV2_18,
	IOBUF_LVDCI_DV2_25,
	IOBUF_LVDCI_DV2_33,
	IOBUF_LVDS,
	IOBUF_LVPECL,
	IOBUF_LVTTL,
	IOBUF_LVTTL_F_12,
	IOBUF_LVTTL_F_16,
	IOBUF_LVTTL_F_2,
	IOBUF_LVTTL_F_24,
	IOBUF_LVTTL_F_4,
	IOBUF_LVTTL_F_6,
	IOBUF_LVTTL_F_8,
	IOBUF_LVTTL_S_12,
	IOBUF_LVTTL_S_16,
	IOBUF_LVTTL_S_2,
	IOBUF_LVTTL_S_24,
	IOBUF_LVTTL_S_4,
	IOBUF_LVTTL_S_6,
	IOBUF_LVTTL_S_8,
	IOBUF_PCI33_3,
	IOBUF_PCI33_5,
	IOBUF_PCI66_3,
	IOBUF_PCIX,
	IOBUF_PCIX66_3,
	IOBUF_SSTL18_I,
	IOBUF_SSTL18_II,
	IOBUF_SSTL18_II_DCI,
	IOBUF_SSTL2_I,
	IOBUF_SSTL2_II,
	IOBUF_SSTL2_II_DCI,
	IOBUF_SSTL3_I,
	IOBUF_SSTL3_II,
	IOBUF_SSTL3_II_DCI,
	IOBUF_S_12,
	IOBUF_S_16,
	IOBUF_S_2,
	IOBUF_S_24,
	IOBUF_S_4,
	IOBUF_S_6,
	IOBUF_S_8,
	IODELAY,
	IODELAY2,
	IODELAYE1,
	ISERDES,
	ISERDESE1,
	ISERDESE2,
	ISERDESE3,
	ISERDES_NODELAY,
	JTAG_SIME2,
	KEEPER,
	KEY_CLEAR,
	LD,
	LDC,
	LDCE,
	LDCE_1,
	LDCP,
	LDCPE,
	LDCPE_1,
	LDCP_1,
	LDC_1,
	LDE,
	LDE_1,
	LDP,
	LDPE,
	LDPE_1,
	LDP_1,
	LD_1,
	LOOKAHEAD8,
	LUT1,
	LUT1_D,
	LUT1_L,
	LUT2,
	LUT2_D,
	LUT2_L,
	LUT3,
	LUT3_D,
	LUT3_L,
	LUT4,
	LUT4_D,
	LUT4_L,
	LUT5,
	LUT5_D,
	LUT5_L,
	LUT6,
	LUT6CY,
	LUT6_2,
	LUT6_D,
	LUT6_L,
	MASTER_JTAG,
	MBUFGCE,
	MBUFGCE_DIV,
	MBUFGCTRL,
	MBUFG_GT,
	MBUFG_PS,
	ME_NOC_M_AXI,
	ME_NOC_M_AXIS,
	ME_NOC_S_AXI,
	ME_NOC_S_AXIS,
	ME_PL_M_AXIS128,
	ME_PL_M_AXIS32,
	ME_PL_M_AXIS64,
	ME_PL_M_EVENTS,
	ME_PL_S_AXIS128,
	ME_PL_S_AXIS32,
	ME_PL_S_AXIS64,
	ME_PL_S_EVENTS,
	MMCME2_ADV,
	MMCME2_BASE,
	MMCME3_ADV,
	MMCME3_BASE,
	MMCME4_ADV,
	MMCME4_BASE,
	MMCME5,
	MMCM_ADV,
	MMCM_BASE,
	MRMAC,
	MULT18X18,
	MULT18X18S,
	MULT18X18SIO,
	MULT_AND,
	MUXCY,
	MUXCY_D,
	MUXCY_L,
	MUXF5,
	MUXF5_D,
	MUXF5_L,
	MUXF6,
	MUXF6_D,
	MUXF6_L,
	MUXF7,
	MUXF7_D,
	MUXF7_L,
	MUXF8,
	MUXF8_D,
	MUXF8_L,
	MUXF9,
	NAND2,
	NAND2B1,
	NAND2B2,
	NAND3,
	NAND3B1,
	NAND3B2,
	NAND3B3,
	NAND4,
	NAND4B1,
	NAND4B2,
	NAND4B3,
	NAND4B4,
	NAND5,
	NAND5B1,
	NAND5B2,
	NAND5B3,
	NAND5B4,
	NAND5B5,
	NOC_NCRB,
	NOC_NIDB,
	NOC_NMU128,
	NOC_NMU256,
	NOC_NMU512,
	NOC_NPP_RPTR,
	NOC_NPS5555,
	NOC_NPS7575,
	NOC_NPS_VNOC,
	NOC_NSU128,
	NOC_NSU512,
	NOR2,
	NOR2B1,
	NOR2B2,
	NOR3,
	NOR3B1,
	NOR3B2,
	NOR3B3,
	NOR4,
	NOR4B1,
	NOR4B2,
	NOR4B3,
	NOR4B4,
	NOR5,
	NOR5B1,
	NOR5B2,
	NOR5B3,
	NOR5B4,
	NOR5B5,
	NPI_NIR,
	OBUF,
	OBUFDS,
	OBUFDS_BLVDS_25,
	OBUFDS_COMP,
	OBUFDS_DPHY,
	OBUFDS_GTE3,
	OBUFDS_GTE3_ADV,
	OBUFDS_GTE4,
	OBUFDS_GTE4_ADV,
	OBUFDS_GTE5,
	OBUFDS_GTE5_ADV,
	OBUFDS_GTM,
	OBUFDS_GTM_ADV,
	OBUFDS_LDT_25,
	OBUFDS_LVDSEXT_25,
	OBUFDS_LVDSEXT_33,
	OBUFDS_LVDS_25,
	OBUFDS_LVDS_33,
	OBUFDS_LVPECL_25,
	OBUFDS_LVPECL_33,
	OBUFDS_ULVDS_25,
	OBUFT,
	OBUFTDS,
	OBUFTDS_BLVDS_25,
	OBUFTDS_COMP,
	OBUFTDS_DCIEN,
	OBUFTDS_LDT_25,
	OBUFTDS_LVDSEXT_25,
	OBUFTDS_LVDSEXT_33,
	OBUFTDS_LVDS_25,
	OBUFTDS_LVDS_33,
	OBUFTDS_LVPECL_25,
	OBUFTDS_LVPECL_33,
	OBUFTDS_ULVDS_25,
	OBUFT_AGP,
	OBUFT_CTT,
	OBUFT_DCIEN,
	OBUFT_F_12,
	OBUFT_F_16,
	OBUFT_F_2,
	OBUFT_F_24,
	OBUFT_F_4,
	OBUFT_F_6,
	OBUFT_F_8,
	OBUFT_GTL,
	OBUFT_GTLP,
	OBUFT_GTLP_DCI,
	OBUFT_GTL_DCI,
	OBUFT_HSTL_I,
	OBUFT_HSTL_II,
	OBUFT_HSTL_III,
	OBUFT_HSTL_III_18,
	OBUFT_HSTL_III_DCI,
	OBUFT_HSTL_III_DCI_18,
	OBUFT_HSTL_II_18,
	OBUFT_HSTL_II_DCI,
	OBUFT_HSTL_II_DCI_18,
	OBUFT_HSTL_IV,
	OBUFT_HSTL_IV_18,
	OBUFT_HSTL_IV_DCI,
	OBUFT_HSTL_IV_DCI_18,
	OBUFT_HSTL_I_18,
	OBUFT_HSTL_I_DCI,
	OBUFT_HSTL_I_DCI_18,
	OBUFT_LVCMOS12,
	OBUFT_LVCMOS12_F_2,
	OBUFT_LVCMOS12_F_4,
	OBUFT_LVCMOS12_F_6,
	OBUFT_LVCMOS12_F_8,
	OBUFT_LVCMOS12_S_2,
	OBUFT_LVCMOS12_S_4,
	OBUFT_LVCMOS12_S_6,
	OBUFT_LVCMOS12_S_8,
	OBUFT_LVCMOS15,
	OBUFT_LVCMOS15_F_12,
	OBUFT_LVCMOS15_F_16,
	OBUFT_LVCMOS15_F_2,
	OBUFT_LVCMOS15_F_4,
	OBUFT_LVCMOS15_F_6,
	OBUFT_LVCMOS15_F_8,
	OBUFT_LVCMOS15_S_12,
	OBUFT_LVCMOS15_S_16,
	OBUFT_LVCMOS15_S_2,
	OBUFT_LVCMOS15_S_4,
	OBUFT_LVCMOS15_S_6,
	OBUFT_LVCMOS15_S_8,
	OBUFT_LVCMOS18,
	OBUFT_LVCMOS18_F_12,
	OBUFT_LVCMOS18_F_16,
	OBUFT_LVCMOS18_F_2,
	OBUFT_LVCMOS18_F_4,
	OBUFT_LVCMOS18_F_6,
	OBUFT_LVCMOS18_F_8,
	OBUFT_LVCMOS18_S_12,
	OBUFT_LVCMOS18_S_16,
	OBUFT_LVCMOS18_S_2,
	OBUFT_LVCMOS18_S_4,
	OBUFT_LVCMOS18_S_6,
	OBUFT_LVCMOS18_S_8,
	OBUFT_LVCMOS2,
	OBUFT_LVCMOS25,
	OBUFT_LVCMOS25_F_12,
	OBUFT_LVCMOS25_F_16,
	OBUFT_LVCMOS25_F_2,
	OBUFT_LVCMOS25_F_24,
	OBUFT_LVCMOS25_F_4,
	OBUFT_LVCMOS25_F_6,
	OBUFT_LVCMOS25_F_8,
	OBUFT_LVCMOS25_S_12,
	OBUFT_LVCMOS25_S_16,
	OBUFT_LVCMOS25_S_2,
	OBUFT_LVCMOS25_S_24,
	OBUFT_LVCMOS25_S_4,
	OBUFT_LVCMOS25_S_6,
	OBUFT_LVCMOS25_S_8,
	OBUFT_LVCMOS33,
	OBUFT_LVCMOS33_F_12,
	OBUFT_LVCMOS33_F_16,
	OBUFT_LVCMOS33_F_2,
	OBUFT_LVCMOS33_F_24,
	OBUFT_LVCMOS33_F_4,
	OBUFT_LVCMOS33_F_6,
	OBUFT_LVCMOS33_F_8,
	OBUFT_LVCMOS33_S_12,
	OBUFT_LVCMOS33_S_16,
	OBUFT_LVCMOS33_S_2,
	OBUFT_LVCMOS33_S_24,
	OBUFT_LVCMOS33_S_4,
	OBUFT_LVCMOS33_S_6,
	OBUFT_LVCMOS33_S_8,
	OBUFT_LVDCI_15,
	OBUFT_LVDCI_18,
	OBUFT_LVDCI_25,
	OBUFT_LVDCI_33,
	OBUFT_LVDCI_DV2_15,
	OBUFT_LVDCI_DV2_18,
	OBUFT_LVDCI_DV2_25,
	OBUFT_LVDCI_DV2_33,
	OBUFT_LVDS,
	OBUFT_LVPECL,
	OBUFT_LVTTL,
	OBUFT_LVTTL_F_12,
	OBUFT_LVTTL_F_16,
	OBUFT_LVTTL_F_2,
	OBUFT_LVTTL_F_24,
	OBUFT_LVTTL_F_4,
	OBUFT_LVTTL_F_6,
	OBUFT_LVTTL_F_8,
	OBUFT_LVTTL_S_12,
	OBUFT_LVTTL_S_16,
	OBUFT_LVTTL_S_2,
	OBUFT_LVTTL_S_24,
	OBUFT_LVTTL_S_4,
	OBUFT_LVTTL_S_6,
	OBUFT_LVTTL_S_8,
	OBUFT_PCI33_3,
	OBUFT_PCI33_5,
	OBUFT_PCI66_3,
	OBUFT_PCIX,
	OBUFT_PCIX66_3,
	OBUFT_SSTL18_I,
	OBUFT_SSTL18_II,
	OBUFT_SSTL18_II_DCI,
	OBUFT_SSTL18_I_DCI,
	OBUFT_SSTL2_I,
	OBUFT_SSTL2_II,
	OBUFT_SSTL2_II_DCI,
	OBUFT_SSTL2_I_DCI,
	OBUFT_SSTL3_I,
	OBUFT_SSTL3_II,
	OBUFT_SSTL3_II_DCI,
	OBUFT_SSTL3_I_DCI,
	OBUFT_S_12,
	OBUFT_S_16,
	OBUFT_S_2,
	OBUFT_S_24,
	OBUFT_S_4,
	OBUFT_S_6,
	OBUFT_S_8,
	OBUF_AGP,
	OBUF_CTT,
	OBUF_F_12,
	OBUF_F_16,
	OBUF_F_2,
	OBUF_F_24,
	OBUF_F_4,
	OBUF_F_6,
	OBUF_F_8,
	OBUF_GTL,
	OBUF_GTLP,
	OBUF_GTLP_DCI,
	OBUF_GTL_DCI,
	OBUF_HSTL_I,
	OBUF_HSTL_II,
	OBUF_HSTL_III,
	OBUF_HSTL_III_18,
	OBUF_HSTL_III_DCI,
	OBUF_HSTL_III_DCI_18,
	OBUF_HSTL_II_18,
	OBUF_HSTL_II_DCI,
	OBUF_HSTL_II_DCI_18,
	OBUF_HSTL_IV,
	OBUF_HSTL_IV_18,
	OBUF_HSTL_IV_DCI,
	OBUF_HSTL_IV_DCI_18,
	OBUF_HSTL_I_18,
	OBUF_HSTL_I_DCI,
	OBUF_HSTL_I_DCI_18,
	OBUF_LVCMOS12,
	OBUF_LVCMOS12_F_2,
	OBUF_LVCMOS12_F_4,
	OBUF_LVCMOS12_F_6,
	OBUF_LVCMOS12_F_8,
	OBUF_LVCMOS12_S_2,
	OBUF_LVCMOS12_S_4,
	OBUF_LVCMOS12_S_6,
	OBUF_LVCMOS12_S_8,
	OBUF_LVCMOS15,
	OBUF_LVCMOS15_F_12,
	OBUF_LVCMOS15_F_16,
	OBUF_LVCMOS15_F_2,
	OBUF_LVCMOS15_F_4,
	OBUF_LVCMOS15_F_6,
	OBUF_LVCMOS15_F_8,
	OBUF_LVCMOS15_S_12,
	OBUF_LVCMOS15_S_16,
	OBUF_LVCMOS15_S_2,
	OBUF_LVCMOS15_S_4,
	OBUF_LVCMOS15_S_6,
	OBUF_LVCMOS15_S_8,
	OBUF_LVCMOS18,
	OBUF_LVCMOS18_F_12,
	OBUF_LVCMOS18_F_16,
	OBUF_LVCMOS18_F_2,
	OBUF_LVCMOS18_F_4,
	OBUF_LVCMOS18_F_6,
	OBUF_LVCMOS18_F_8,
	OBUF_LVCMOS18_S_12,
	OBUF_LVCMOS18_S_16,
	OBUF_LVCMOS18_S_2,
	OBUF_LVCMOS18_S_4,
	OBUF_LVCMOS18_S_6,
	OBUF_LVCMOS18_S_8,
	OBUF_LVCMOS2,
	OBUF_LVCMOS25,
	OBUF_LVCMOS25_F_12,
	OBUF_LVCMOS25_F_16,
	OBUF_LVCMOS25_F_2,
	OBUF_LVCMOS25_F_24,
	OBUF_LVCMOS25_F_4,
	OBUF_LVCMOS25_F_6,
	OBUF_LVCMOS25_F_8,
	OBUF_LVCMOS25_S_12,
	OBUF_LVCMOS25_S_16,
	OBUF_LVCMOS25_S_2,
	OBUF_LVCMOS25_S_24,
	OBUF_LVCMOS25_S_4,
	OBUF_LVCMOS25_S_6,
	OBUF_LVCMOS25_S_8,
	OBUF_LVCMOS33,
	OBUF_LVCMOS33_F_12,
	OBUF_LVCMOS33_F_16,
	OBUF_LVCMOS33_F_2,
	OBUF_LVCMOS33_F_24,
	OBUF_LVCMOS33_F_4,
	OBUF_LVCMOS33_F_6,
	OBUF_LVCMOS33_F_8,
	OBUF_LVCMOS33_S_12,
	OBUF_LVCMOS33_S_16,
	OBUF_LVCMOS33_S_2,
	OBUF_LVCMOS33_S_24,
	OBUF_LVCMOS33_S_4,
	OBUF_LVCMOS33_S_6,
	OBUF_LVCMOS33_S_8,
	OBUF_LVDCI_15,
	OBUF_LVDCI_18,
	OBUF_LVDCI_25,
	OBUF_LVDCI_33,
	OBUF_LVDCI_DV2_15,
	OBUF_LVDCI_DV2_18,
	OBUF_LVDCI_DV2_25,
	OBUF_LVDCI_DV2_33,
	OBUF_LVDS,
	OBUF_LVPECL,
	OBUF_LVTTL,
	OBUF_LVTTL_F_12,
	OBUF_LVTTL_F_16,
	OBUF_LVTTL_F_2,
	OBUF_LVTTL_F_24,
	OBUF_LVTTL_F_4,
	OBUF_LVTTL_F_6,
	OBUF_LVTTL_F_8,
	OBUF_LVTTL_S_12,
	OBUF_LVTTL_S_16,
	OBUF_LVTTL_S_2,
	OBUF_LVTTL_S_24,
	OBUF_LVTTL_S_4,
	OBUF_LVTTL_S_6,
	OBUF_LVTTL_S_8,
	OBUF_PCI33_3,
	OBUF_PCI33_5,
	OBUF_PCI66_3,
	OBUF_PCIX,
	OBUF_PCIX66_3,
	OBUF_SSTL18_I,
	OBUF_SSTL18_II,
	OBUF_SSTL18_II_DCI,
	OBUF_SSTL18_I_DCI,
	OBUF_SSTL2_I,
	OBUF_SSTL2_II,
	OBUF_SSTL2_II_DCI,
	OBUF_SSTL2_I_DCI,
	OBUF_SSTL3_I,
	OBUF_SSTL3_II,
	OBUF_SSTL3_II_DCI,
	OBUF_SSTL3_I_DCI,
	OBUF_S_12,
	OBUF_S_16,
	OBUF_S_2,
	OBUF_S_24,
	OBUF_S_4,
	OBUF_S_6,
	OBUF_S_8,
	ODDR,
	ODDR2,
	ODDRE1,
	ODELAYE2,
	ODELAYE2_FINEDELAY,
	ODELAYE3,
	ODELAYE5,
	OR2,
	OR2B1,
	OR2B2,
	OR2L,
	OR3,
	OR3B1,
	OR3B2,
	OR3B3,
	OR4,
	OR4B1,
	OR4B2,
	OR4B3,
	OR4B4,
	OR5,
	OR5B1,
	OR5B2,
	OR5B3,
	OR5B4,
	OR5B5,
	OSERDES,
	OSERDESE1,
	OSERDESE2,
	OSERDESE3,
	OUT_FIFO,
	PCIE40E4,
	PCIE40E5,
	PCIE4CE4,
	PCIE_2_1,
	PCIE_3_0,
	PCIE_3_1,
	PHASER_IN,
	PHASER_IN_PHY,
	PHASER_OUT,
	PHASER_OUT_PHY,
	PHASER_REF,
	PHY_CONTROL,
	PLLE2_ADV,
	PLLE2_BASE,
	PLLE3_ADV,
	PLLE3_BASE,
	PLLE4_ADV,
	PLLE4_BASE,
	PLL_ADV,
	PLL_BASE,
	PS7,
	PS8,
	PS9,
	PULLDOWN,
	PULLUP,
	PVT_SAS,
	RAM128X1D,
	RAM128X1S,
	RAM128X1S_1,
	RAM16X1D,
	RAM16X1D_1,
	RAM16X1S,
	RAM16X1S_1,
	RAM16X2S,
	RAM16X4S,
	RAM16X8S,
	RAM256X1D,
	RAM256X1S,
	RAM32M,
	RAM32M16,
	RAM32X16DR8,
	RAM32X1D,
	RAM32X1D_1,
	RAM32X1S,
	RAM32X1S_1,
	RAM32X2S,
	RAM32X4S,
	RAM32X8S,
	RAM512X1S,
	RAM64M,
	RAM64M8,
	RAM64X1D,
	RAM64X1D_1,
	RAM64X1S,
	RAM64X1S_1,
	RAM64X2S,
	RAM64X8SW,
	RAMB16,
	RAMB16BWE,
	RAMB16BWER,
	RAMB16BWE_S18,
	RAMB16BWE_S18_S18,
	RAMB16BWE_S18_S9,
	RAMB16BWE_S36,
	RAMB16BWE_S36_S18,
	RAMB16BWE_S36_S36,
	RAMB16BWE_S36_S9,
	RAMB16_S1,
	RAMB16_S18,
	RAMB16_S18_S18,
	RAMB16_S18_S36,
	RAMB16_S1_S1,
	RAMB16_S1_S18,
	RAMB16_S1_S2,
	RAMB16_S1_S36,
	RAMB16_S1_S4,
	RAMB16_S1_S9,
	RAMB16_S2,
	RAMB16_S2_S18,
	RAMB16_S2_S2,
	RAMB16_S2_S36,
	RAMB16_S2_S4,
	RAMB16_S2_S9,
	RAMB16_S36,
	RAMB16_S36_S36,
	RAMB16_S4,
	RAMB16_S4_S18,
	RAMB16_S4_S36,
	RAMB16_S4_S4,
	RAMB16_S4_S9,
	RAMB16_S9,
	RAMB16_S9_S18,
	RAMB16_S9_S36,
	RAMB16_S9_S9,
	RAMB18,
	RAMB18E1,
	RAMB18E2,
	RAMB18E5,
	RAMB18E5_INT,
	RAMB18SDP,
	RAMB36,
	RAMB36E1,
	RAMB36E2,
	RAMB36E5,
	RAMB36E5_INT,
	RAMB36SDP,
	RAMB8BWER,
	RAMD32,
	RAMD32M64,
	RAMD64E,
	RAMS32,
	RAMS64E,
	RAMS64E1,
	RIU_OR,
	ROM128X1,
	ROM16X1,
	ROM256X1,
	ROM32X1,
	ROM64X1,
	RXTX_BITSLICE,
	RX_BITSLICE,
	SIM_CONFIGE2,
	SIM_CONFIGE3,
	SRL16,
	SRL16E,
	SRL16E_1,
	SRL16_1,
	SRL32E,
	SRLC16,
	SRLC16E,
	SRLC16E_1,
	SRLC16_1,
	SRLC32E,
	STARTUPE2,
	STARTUPE3,
	STARTUP_SPARTAN3,
	STARTUP_SPARTAN3A,
	STARTUP_SPARTAN6,
	STARTUP_VIRTEX4,
	STARTUP_VIRTEX5,
	STARTUP_VIRTEX6,
	SYSMON,
	SYSMONE1,
	SYSMONE4,
	TEMAC_SINGLE,
	TX_BITSLICE,
	TX_BITSLICE_TRI,
	URAM288,
	URAM288E5,
	URAM288E5_BASE,
	URAM288_BASE,
	USR_ACCESSE2,
	USR_ACCESS_VIRTEX4,
	USR_ACCESS_VIRTEX5,
	USR_ACCESS_VIRTEX6,
	VCC,
	VCU,
	XADC,
	XNOR2,
	XNOR3,
	XNOR4,
	XNOR5,
	XOR2,
	XOR3,
	XOR4,
	XOR5,
	XORCY,
	XORCY_D,
	XORCY_L,
	XPHY,
	XPIO_VREF,
	XPIPE_QUAD,
	XPLL,
	ZHOLD_DELAY,
;

	private static Map<Unisim,Unisim[]> series7UnisimTransforms;

	private static Map<Unisim,Unisim[]> ultraScaleUnisimTransforms;

	static {
		series7UnisimTransforms = new HashMap<Unisim, Unisim[]>();
		series7UnisimTransforms.put(Unisim.IOBUFDS_DIFF_OUT,new Unisim[]{Unisim.IBUFDS,Unisim.IBUFDS,Unisim.OBUFTDS});
		series7UnisimTransforms.put(Unisim.RAM64X2S,new Unisim[]{Unisim.RAM64X1S,Unisim.RAM64X1S});
		series7UnisimTransforms.put(Unisim.FDCPE,new Unisim[]{Unisim.FDCE,Unisim.FDPE,Unisim.LDCE,Unisim.LUT3});
		series7UnisimTransforms.put(Unisim.IOBUF_DCIEN,new Unisim[]{Unisim.IBUF_IBUFDISABLE,Unisim.OBUFT_DCIEN});
		series7UnisimTransforms.put(Unisim.RAM128X1S,new Unisim[]{Unisim.RAMS64E,Unisim.RAMS64E,Unisim.MUXF7});
		series7UnisimTransforms.put(Unisim.RAM16X2S,new Unisim[]{Unisim.RAM32X1S,Unisim.RAM32X1S});
		series7UnisimTransforms.put(Unisim.RAM64X1D,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E});
		series7UnisimTransforms.put(Unisim.IBUFDS,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		series7UnisimTransforms.put(Unisim.IOBUFDS,new Unisim[]{Unisim.IBUFDS,Unisim.OBUFTDS});
		series7UnisimTransforms.put(Unisim.LDCP,new Unisim[]{Unisim.LDCE,Unisim.LUT3,Unisim.LUT3});
		series7UnisimTransforms.put(Unisim.IBUF_IBUFDISABLE,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		series7UnisimTransforms.put(Unisim.IBUFDS_IBUFDISABLE_INT,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		series7UnisimTransforms.put(Unisim.RAM256X1S,new Unisim[]{Unisim.RAMS64E,Unisim.RAMS64E,Unisim.RAMS64E,Unisim.RAMS64E,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF8});
		series7UnisimTransforms.put(Unisim.FDCP,new Unisim[]{Unisim.FDCE,Unisim.FDPE,Unisim.LDCE,Unisim.LUT3});
		series7UnisimTransforms.put(Unisim.LUT6_2,new Unisim[]{Unisim.LUT6,Unisim.LUT5});
		series7UnisimTransforms.put(Unisim.RAM128X1D,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.MUXF7,Unisim.MUXF7});
		series7UnisimTransforms.put(Unisim.ROM128X1,new Unisim[]{Unisim.LUT6,Unisim.LUT6,Unisim.MUXF7});
		series7UnisimTransforms.put(Unisim.IBUFDS_DIFF_OUT,new Unisim[]{Unisim.IBUFDS,Unisim.IBUFDS});
		series7UnisimTransforms.put(Unisim.IOBUF,new Unisim[]{Unisim.IBUF,Unisim.OBUFT});
		series7UnisimTransforms.put(Unisim.CFGLUT5,new Unisim[]{Unisim.SRLC32E});
		series7UnisimTransforms.put(Unisim.RAM64M,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E});
		series7UnisimTransforms.put(Unisim.FDRS_1,new Unisim[]{Unisim.FDRE,Unisim.LUT2});
		series7UnisimTransforms.put(Unisim.FDRSE,new Unisim[]{Unisim.FDRE,Unisim.LUT4});
		series7UnisimTransforms.put(Unisim.IOBUFDS_INTERMDISABLE,new Unisim[]{Unisim.IBUFDS_INTERMDISABLE,Unisim.OBUFTDS});
		series7UnisimTransforms.put(Unisim.RAM32X4S,new Unisim[]{Unisim.RAM32X2S,Unisim.RAM32X2S});
		series7UnisimTransforms.put(Unisim.IBUFDS_INTERMDISABLE,new Unisim[]{Unisim.IBUFDS_INTERMDISABLE_INT,Unisim.IBUFDS_INTERMDISABLE_INT});
		series7UnisimTransforms.put(Unisim.LDCPE,new Unisim[]{Unisim.LDCE,Unisim.LUT3,Unisim.LUT4});
		series7UnisimTransforms.put(Unisim.IBUFDS_IBUFDISABLE,new Unisim[]{Unisim.IBUFDS_IBUFDISABLE_INT,Unisim.IBUFDS_IBUFDISABLE_INT});
		series7UnisimTransforms.put(Unisim.RAM16X8S,new Unisim[]{Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S});
		series7UnisimTransforms.put(Unisim.IBUF,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		series7UnisimTransforms.put(Unisim.IOBUFDS_DIFF_OUT_INTERMDISABLE,new Unisim[]{Unisim.IBUFDS_INTERMDISABLE_INT,Unisim.IBUFDS_INTERMDISABLE_INT,Unisim.OBUFTDS});
		series7UnisimTransforms.put(Unisim.RAM32X1D,new Unisim[]{Unisim.RAMD32,Unisim.RAMD32});
		series7UnisimTransforms.put(Unisim.IBUFDS_DIFF_OUT_INTERMDISABLE,new Unisim[]{Unisim.IBUFDS_INTERMDISABLE_INT,Unisim.IBUFDS_INTERMDISABLE_INT});
		series7UnisimTransforms.put(Unisim.IBUFDS_DIFF_OUT_IBUFDISABLE,new Unisim[]{Unisim.IBUFDS_IBUFDISABLE_INT,Unisim.IBUFDS_IBUFDISABLE_INT});
		series7UnisimTransforms.put(Unisim.FDRS,new Unisim[]{Unisim.FDRE,Unisim.LUT2});
		series7UnisimTransforms.put(Unisim.RAM32M,new Unisim[]{Unisim.RAMS32,Unisim.RAMS32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32});
		series7UnisimTransforms.put(Unisim.FDRSE_1,new Unisim[]{Unisim.FDRE,Unisim.LUT4});
		series7UnisimTransforms.put(Unisim.IOBUFDS_DCIEN,new Unisim[]{Unisim.IBUFDS_IBUFDISABLE,Unisim.OBUFTDS_DCIEN});
		series7UnisimTransforms.put(Unisim.IOBUFDS_DIFF_OUT_DCIEN,new Unisim[]{Unisim.IBUFDS_IBUFDISABLE_INT,Unisim.IBUFDS_IBUFDISABLE_INT,Unisim.OBUFTDS_DCIEN});
		series7UnisimTransforms.put(Unisim.ROM256X1,new Unisim[]{Unisim.LUT6,Unisim.LUT6,Unisim.LUT6,Unisim.LUT6,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF8});
		series7UnisimTransforms.put(Unisim.BUFGP,new Unisim[]{Unisim.BUFG,Unisim.IBUF});
		series7UnisimTransforms.put(Unisim.IBUF_INTERMDISABLE,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		series7UnisimTransforms.put(Unisim.IOBUF_INTERMDISABLE,new Unisim[]{Unisim.IBUF_INTERMDISABLE,Unisim.OBUFT});
		series7UnisimTransforms.put(Unisim.RAM32X2S,new Unisim[]{Unisim.RAM32X1S,Unisim.RAM32X1S});
		series7UnisimTransforms.put(Unisim.RAM32X8S,new Unisim[]{Unisim.RAM32X4S,Unisim.RAM32X4S});
		series7UnisimTransforms.put(Unisim.RAM16X4S,new Unisim[]{Unisim.RAM16X2S,Unisim.RAM16X2S});
		ultraScaleUnisimTransforms = new HashMap<Unisim, Unisim[]>();
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDS_DIFF_OUT,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.IBUFCTRL,Unisim.OBUFTDS});
		ultraScaleUnisimTransforms.put(Unisim.FDCPE,new Unisim[]{Unisim.FDCE,Unisim.FDPE,Unisim.LDCE,Unisim.LUT3});
		ultraScaleUnisimTransforms.put(Unisim.IOBUF_DCIEN,new Unisim[]{Unisim.INBUF,Unisim.OBUFT_DCIEN,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.RAM128X1S,new Unisim[]{Unisim.RAMS64E,Unisim.RAMS64E,Unisim.MUXF7});
		ultraScaleUnisimTransforms.put(Unisim.RAM64X1D,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDS,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.OBUFTDS});
		ultraScaleUnisimTransforms.put(Unisim.LDCP,new Unisim[]{Unisim.LDCE,Unisim.LUT3,Unisim.LUT3});
		ultraScaleUnisimTransforms.put(Unisim.DSP48E2,new Unisim[]{Unisim.DSP_ALU,Unisim.DSP_A_B_DATA,Unisim.DSP_C_DATA,Unisim.DSP_M_DATA,Unisim.DSP_MULTIPLIER,Unisim.DSP_OUTPUT,Unisim.DSP_PREADD,Unisim.DSP_PREADD_DATA});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS_IBUFDISABLE_INT,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.RAM256X1S,new Unisim[]{Unisim.RAMS64E,Unisim.RAMS64E,Unisim.RAMS64E,Unisim.RAMS64E,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF8});
		ultraScaleUnisimTransforms.put(Unisim.FDCP,new Unisim[]{Unisim.FDCE,Unisim.FDPE,Unisim.LDCE,Unisim.LUT3});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDSE3,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.LUT6_2,new Unisim[]{Unisim.LUT6,Unisim.LUT5});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS_DIFF_OUT,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.CFGLUT5,new Unisim[]{Unisim.SRLC32E});
		ultraScaleUnisimTransforms.put(Unisim.FDRSE,new Unisim[]{Unisim.FDRE,Unisim.LUT4});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDS_INTERMDISABLE,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.OBUFTDS});
		ultraScaleUnisimTransforms.put(Unisim.RAM32X4S,new Unisim[]{Unisim.RAM32X2S,Unisim.RAM32X2S});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS_INTERMDISABLE,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.LDCPE,new Unisim[]{Unisim.LDCE,Unisim.LUT3,Unisim.LUT4});
		ultraScaleUnisimTransforms.put(Unisim.RAM256X1D,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF8,Unisim.MUXF8});
		ultraScaleUnisimTransforms.put(Unisim.RAM16X8S,new Unisim[]{Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S,Unisim.RAM32X1S});
		ultraScaleUnisimTransforms.put(Unisim.IBUF,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.RAM32X1D,new Unisim[]{Unisim.RAMD32,Unisim.RAMD32});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS_DIFF_OUT_IBUFDISABLE,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.FDRS,new Unisim[]{Unisim.FDRE,Unisim.LUT2});
		ultraScaleUnisimTransforms.put(Unisim.RAM32M,new Unisim[]{Unisim.RAMS32,Unisim.RAMS32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32});
		ultraScaleUnisimTransforms.put(Unisim.FDRSE_1,new Unisim[]{Unisim.FDRE,Unisim.LUT4});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDS_DIFF_OUT_DCIEN,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.IBUFCTRL,Unisim.OBUFTDS_DCIEN});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDSE3,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.OBUFTDS_DCIEN});
		ultraScaleUnisimTransforms.put(Unisim.RAM64X2S,new Unisim[]{Unisim.RAM64X1S,Unisim.RAM64X1S});
		ultraScaleUnisimTransforms.put(Unisim.RAM16X2S,new Unisim[]{Unisim.RAM32X1S,Unisim.RAM32X1S});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.IBUF_IBUFDISABLE,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.RAM128X1D,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.MUXF7,Unisim.MUXF7});
		ultraScaleUnisimTransforms.put(Unisim.ROM128X1,new Unisim[]{Unisim.LUT6,Unisim.LUT6,Unisim.MUXF7});
		ultraScaleUnisimTransforms.put(Unisim.IOBUF,new Unisim[]{Unisim.INBUF,Unisim.OBUFT,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.IBUFE3,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.RAM64M,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E});
		ultraScaleUnisimTransforms.put(Unisim.FDRS_1,new Unisim[]{Unisim.FDRE,Unisim.LUT2});
		ultraScaleUnisimTransforms.put(Unisim.RAM512X1S,new Unisim[]{Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.RAMS64E1,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF8,Unisim.MUXF8,Unisim.MUXF9});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS_IBUFDISABLE,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFE3,new Unisim[]{Unisim.INBUF,Unisim.OBUFT_DCIEN,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDS_DIFF_OUT_INTERMDISABLE,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.IBUFCTRL,Unisim.OBUFTDS});
		ultraScaleUnisimTransforms.put(Unisim.RAM32M16,new Unisim[]{Unisim.RAMS32,Unisim.RAMS32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32,Unisim.RAMD32});
		ultraScaleUnisimTransforms.put(Unisim.IBUFDS_DIFF_OUT_INTERMDISABLE,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.IOBUFDS_DCIEN,new Unisim[]{Unisim.DIFFINBUF,Unisim.IBUFCTRL,Unisim.OBUFTDS_DCIEN});
		ultraScaleUnisimTransforms.put(Unisim.RAM64M8,new Unisim[]{Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E,Unisim.RAMD64E});
		ultraScaleUnisimTransforms.put(Unisim.ROM256X1,new Unisim[]{Unisim.LUT6,Unisim.LUT6,Unisim.LUT6,Unisim.LUT6,Unisim.MUXF7,Unisim.MUXF7,Unisim.MUXF8});
		ultraScaleUnisimTransforms.put(Unisim.BUFGP,new Unisim[]{Unisim.BUFG,Unisim.IBUF});
		ultraScaleUnisimTransforms.put(Unisim.IBUF_INTERMDISABLE,new Unisim[]{Unisim.INBUF,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.IOBUF_INTERMDISABLE,new Unisim[]{Unisim.INBUF,Unisim.OBUFT,Unisim.IBUFCTRL});
		ultraScaleUnisimTransforms.put(Unisim.RAM32X2S,new Unisim[]{Unisim.RAM32X1S,Unisim.RAM32X1S});
		ultraScaleUnisimTransforms.put(Unisim.RAM32X8S,new Unisim[]{Unisim.RAM32X4S,Unisim.RAM32X4S});
		ultraScaleUnisimTransforms.put(Unisim.RAM16X4S,new Unisim[]{Unisim.RAM16X2S,Unisim.RAM16X2S});
	}
	
	/**
	 * Determines if on given series, if the unisim is transformed to
	 * different unisim type(s).  
	 * @param s The architectural series in question.
	 * @return True if unisim is transformed for the given architecture, false otherwise.
	 */
	public boolean hasTransform(Series s){
		if(s == Series.Series7) return series7UnisimTransforms.containsKey(this);
		return ultraScaleUnisimTransforms.containsKey(this);
	}
	
	private static final Unisim[] EMPTY_ARRAY = {};
	
	/**
	 * Gets the set of unisims the provided unisim transforms to in a
	 * given series.
	 * @param s The architectural series in question.
	 * @return An array populated with the set of unisims that emulate
	 * this unisim or an empty array if no such transform is needed.
	 */
	public Unisim[] getTransform(Series s){
		Map<Unisim,Unisim[]> map = s == Series.Series7 ? series7UnisimTransforms : ultraScaleUnisimTransforms;
		Unisim[] value = map.get(this);
		return value == null ? EMPTY_ARRAY : value;
	}
}
